Date of Award
Spring 5-8-2024
Degree Name
Master of Science (MS)
Degree Type
Thesis
Abstract
In recent years, the demand for high-performance micro and nanodevices has surged, necessitating the exploration of novel dielectric materials to replace conventional silicon dioxide. Following the continuation of the Moorse law, as device dimensions reduce to nanoscale levels, the properties of silicon dioxide can degrade, leading to issues such as increased leakage current and reduced gate control. Materials with superior electrical properties, such as higher dielectric constant, lower leakage current, and better thermal stability allowing for the development of faster, more efficient, and more reliable devices are in higher demand than ever. Two-dimensional layered semiconductor nanomaterials represented by compounds such as bismuth selenite (Bi2SeO5) have promising potential due to their unique electrical and mechanical properties. In contrast to the conventional micro and nanoelectronic devices that use silicon-based dielectrics, bismuth selenite’s high-k dielectric property can allow the fabrication of devices that can store more electric charge and can help with reduced power consumption, increased speed, and overall improvement of the device performance. The high dielectric value for Bi2SeO5 can open the possibility of overcoming the challenges faced during the scaling of sub-ten nanometer technology for ultrathin silicon channels. Motivated by a recent academic paper where bismuth selenite is suggested as an alternative dielectric material with a high dielectric constant ‘k’ value of 16, this paper investigates the reproducibility of these claims. In this paper, we explore the fabrication process for two nanocapacitors using bismuth selenite as a part of the dielectric stack and compare the extracted dielectric values to the findings from the recent academic literature. We find that the dielectric constant across two fabricated devices were 3.5 and 4.1 respectively, and did not align with the claims from the academic literature. The device fabrication is an attempt to explore nanofabricated capacitors with the potential of lowering the gate voltage, more efficient gate-field penetration, and power consumption in 2D electronics and integrated circuits.
Language
English (en)
Chair
Kathy Flores
Committee Members
Erik Henriksen (Advisor) Sanghoon Bae Swami Karunamoorthy