Date of Award
Spring 5-11-2024
Degree Name
Master of Science (MS)
Degree Type
Thesis
Abstract
Radio Frequency Identification (RFID) is a technology used in many industries to locate and track assets. Passive RFID tags are popular because they are inexpensive and flexible, but they have limited accuracy. My thesis aims to improve the accuracy of passive RFID tags by investigating two solutions: (a) Using orthogonal RFID configuration and exploiting phase information available to an RFID reader, in addition to the received signal strength indicator (RSSI) metric; and (b) Designing a novel voltage multiplier-based correlator circuit that can be integrated directly onto the tag. To further reduce power consumption and silicon area, we propose an architecture that combines the energy-harvesting capability of RFID power circuits with the calculation of correlation. This results in a tag peripheral circuit that consumes minimal power and generates a unique output voltage based on the correlation of input signals. These correlator architectures enable bundling of multiple data types into a singular input, such as clock, signal, and power. The designs are fully passive, and the only power consumption occurs when the measured correlation exceeds a pre-specified threshold. We analyzed these correlator architectures from design proposals to physical testing with designed IC chips to provide an initial hardware characterization.
Language
English (en)
Chair
Shantanu Chakrabartty
Committee Members
Roger Chamberlain Darko Ivanovich
Included in
Electrical and Electronics Commons, VLSI and Circuits, Embedded and Hardware Systems Commons