Design of a Clock Generator Chip

Authors

Tony Y. Mazraani, Washington University in St. Louis

Document Type

Technical Report

Publication Date

1988-12-01

Filename

WUCS-88-36.pdf

Technical Report Number

WUCS-88-36

Abstract

This report describes the design of a Clock Generator Chip. The purpose of this chip is to generate a non-overlapping three-phrase clock from single 50% duty-cycle clock. The design includes combinational logic, VLSI layout, and logic and timing simulations.

Comments

Permanent URL: http://dx.doi.org/10.7936/K7NG4P0R

Recommended Citation

Mazraani, Tony Y., "Design of a Clock Generator Chip" Report Number: WUCS-88-36 (1988). All Computer Science and Engineering Research.
https://openscholarship.wustl.edu/cse_research/793