Document Type

Technical Report

Publication Date

1988-10-01

Filename

WUCS-88-35.pdf

DOI:

10.7936/K7HT2MNW

Technical Report Number

WUCS-88-35

Abstract

Simulation needs for design analysis, verification, and testing have become increasingly important as integrated circuit size and complexity have grown. One technique for dealing with this problem is to utilize hierarchical modeling and simulation methods. This paper presents an analysis of hierarchical simulation systems in terms of two performance measures; the number of statements required for describing a system, and the simulation system execution time associated with a given hierarchical system representation. A model of hierarchical simulation system performance is developed. The performance of the hierarchical simulator, lsim2, is examined through its use on the set of benchmark circuits and the results discussed in light of model predictions.

Comments

Permanent URL: http://dx.doi.org/10.7936/K7HT2MNW

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