Document Type

Technical Report

Publication Date

1990-05-01

Filename

WUCS-90-08.pdf

Technical Report Number

WUCS-90-08

Abstract

A high-level area model of Benes and crossbar networks in a VLSI environment is presented. The areas of both networks are then compared for different design parameters. The results are also compared to those obtained by Franklin [Fr81] for banyan and crossbar networks. The geometric chip layout employs two metal layers for the interconnection paths. It is show that both Benes and crossbar grow in area as O(N)2, where N is the network size.

Comments

Permanent URL: http://dx.doi.org/10.7936/K7Z31WZN

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