Title

Axon Host-Network Interface Architecture for Gigabit Communication

Authors

James P.G. Sterbenz, Washington University in St Louis
Gurudatta M. Parulkar, Washington University in St Louis

Document Type

Technical Report

Publication Date

1991-12-01

Filename

WUCS-91-57.pdf

DOI:

10.7936/K7ZG6QMS

Technical Report Number

WUCS-91-57

Abstract

This paper describes the design of the Axon host-network interface architecture, and performance factors determining its design. The Axon project is investigating an integrated design of the host architecture, operating systems, and communications protocols to allow applications to utilise the high bandwidth provided by the next generation of communications networks. The Axon host architecture and network interface is designed to provide a path directly between the network interface with direct access to host memory, capable of delivering bandwidth in excess of 1 Gbps to applications. This provide the ability to support demanding applications such as scientific visualisation and imaging.

Comments

Permanent URL: http://dx.doi.org/10.7936/K7ZG6QMS

Recommended Citation

Sterbenz, James P.G. and Parulkar, Gurudatta M., "Axon Host-Network Interface Architecture for Gigabit Communication" Report Number: WUCS-91-57 (1991). All Computer Science and Engineering Research.
https://openscholarship.wustl.edu/cse_research/675