Document Type

Technical Report

Publication Date

1991-10-09

Filename

WUCS-91-47.pdf

Technical Report Number

WUCS-91-47

Abstract

There have been a number of ATM switching system architectures proposed, but little in the way of comparison to indicate which architectures are preferable from a cost standpoint given specific performance requirements. This paper considers a range of performance requirements and compares various architectures base don the number of pin-limited chips needed to realize a system which can meet the requirements. Our results indicate that certain architectures, for example the Knockout network, are not competitive within the range we considered. Other architectures perform reasonably well in some cases, but less well in others. The buffered Beness network with shared buffering at each switch element consistently has the lowest chip count over a range of network sizes and performance requirements.

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Permanent URL: http://dx.doi.org/10.7936/K7C827P1

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