Document Type

Technical Report

Department

Computer Science and Engineering

Publication Date

1994-01-01

Filename

WUCS-94-25.PDF

Technical Report Number

WUCS-94-25

Abstract

Large scale multimedia storage servers will be an integral part of the emerging distributed multimedia computing infrastructure. However, given the modest rate of improvements in storage transfer rates, designing servers that meet the demands of multimedia applications is a challenging task that needs significant architectural innovation. Our research project, called Massively-parallel And Real-time Storage (MARS) architecture, is aimed at the design and prototype implementation of a large scale multimedia storage server. It uses some of the well-known techniques in parallel I/O, such as data striping and Redundant Arrays of Inexpensive Disks (RAID) and an innovative ATM based interconnect inside the server to achieve a scalable architecture that transparently connects storage devices to an ATM-based broadband network. The ATM interconnect within the server uses a custom ASIC called ATM Port Interconnect Controller (APIC) currently being developed as a part of an ARPA sponsored gigabit local ATM testbed. Our architecture relies on innovative data striping and real-time scheduling to allow a large number of guaranteed concurrent accesses, and uses separation of metadata from real data to achieve a direct flow of the media streams between the storage devices and the network. This paper presents our system architecture; one that is scalable in terms of the number of supported users and the throughput.

Comments

Permanent URL: http://dx.doi.org/10.7936/K7VQ30VK

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