Technical Report Number
Demands for flexible processing has moved general-purpose processing into the data path of networks. With the development of System-On-a-Chip technology, it is possible to put several processors with memory and I/O components on a single ASIC. We present a model of such a system with a simple performance metric and show how the number of processors and cache sizes can be optimized for a given workload. Based on a telecommunications benchmark we show the results of such an optimization and discuss how specialied hardware and appropriate scheduling can further improve system performance.
Wolf, Tilman; Franklin, Mark; and Spitznagel, Edward W., "Design Tradeoffs for Embedded Network Processors" Report Number: WUCS-00-24 (2000). All Computer Science and Engineering Research.
Permanent URL: http://dx.doi.org/10.7936/K76W98B8