Document Type

Technical Report

Publication Date

2003-08-22

Filename

wucse-2003-61.pdf

Technical Report Number

WUCSE-2003-61

Abstract

Chip Multi-Processors(CMPs) are now available in a variety of systems. They provide the opportunity to achieve high computational performance by exploiting application-level parallelism within a single chip form factor. In the communications environment, network processors (NPs) are often designed around CMP architectures and, in this context, the processors may be used in a pipelined manner. This leads to the issue of scheduling tasks on such processor pipelines. A tool and algorithm called Greedy pipe has been developed that determines the nearly optimal schedules for such multiprocessor pipelines. The tool offers a user friendly interface, with easily installable, portable and high-performance design. This report contains a description of the Greedy pipe tool set (release1.0), including the tool retrieval, installation and usage instructions.

Comments

Permanent URL: http://dx.doi.org/10.7936/K72J6962

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