Data from Virtualized Hardware Logic Computations
National Science Foundation
NSF grant CNS-0931693 and Exegy, Inc.
Data files supporting paper. Paper abstract: Visualization of logic computations (i.e., by sharing a fixed function across distinct data streams) provides a means to effectively utilize hardware resources by context switching the logic to support multiple data streams of computation and to improve the total throughput of all streams. Context switching allows the pipeline stages of the logic to be fully utilized when feedback is present and to support additional contexts using secondary memory. In this paper, we analyze the performance of a virtualized hardware design and develop M/G/1 queueing model equations to predict circuit performance. The server is modeled using a general distribution that takes vacations during the computation of an individual data stream. Using the model, we predict circuit performance and tune a schedule for optimal performance.
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Hall, Michael J.; Olson, Neil; and Chamberlain, Roger, "Data from Virtualized Hardware Logic Computations" (2021). Digital Research Materials (Data & Supplemental files). 60.