Technical Report Number
In this paper, a set of simple, general, yet practical performance models for RISC architectures are developed. These models apply to a wide range of systems that include both pipelined and superscalar systems operating in either clocked or asynchronous environments. The models permit quantitative evaluation of various design choices (e.g., the number of pipelines in the system, the pipeline depth, and the choice between clocked and asynchronous methodologies) as functions of technology parameters, environmental operating parameters, and pipeline function characteristics. Design curves are presented indicating optimal pipeline depth and number of pipelines to employ under various conditions.
Franklin, Mark A. and Pan, Tienyo, "Pipelined and Superscalar Architectures in Clocked and Asynchronous Environments" Report Number: WUCS-94-32 (1994). All Computer Science and Engineering Research.
Permanent URL: http://dx.doi.org/10.7936/K72Z13QJ