Document Type

Technical Report


Computer Science and Engineering

Publication Date






Technical Report Number



The last few years have seen network data rates skyrocket from a few Mbps to a Gbps or more. However, a lack of integration of the host-netowrk interface, the operating system, and network protocols has resulted in end-applications seeing only a small fraction of this total bandwidth being available for data transfer. The emergence of demanding applications in the realms of multimedia and virtual reality provides further impetus in the drive to overcome this problem. In this paper, we present the design of a high performance ATM host-network interface for workstations and servers that can support a bidirecitonal sustained data rate in excess of a gigabit per second. A prototype of the interface is being build at Washington University as part of an ARPA-sponsored gigabit local ATM testbed. Our interface design, which emphasizes seamless integration with the OS and network protocols, features: support for streaming data from I/O devices (e.g., cameras, disk arrays, etc.) to the network or vice-versa, as well as from device-to-device, while bypassing the main system bus; an ATM interconnect that extends to the desk-area; a zero-copy interface to system memory that is achieved through the use of page remapping techniques; full AAL-5 segmentation and reassembly; pacing control that provides for single-parameter bandwidth reservation; a high degree of scalability in terms of the number of I/O devides that can be simultaneously supported; low-cost (one ASIC); and multiprocessor support.


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