Title

Globally Clocked Magnetic Logic Circuits

Authors

Michael Hall, Washington University in St Louis
Albrecht Jander, Washington University in St Louis
Roger D. Chamberlain, Washington University in St LouisFollow
Pallavi Dhagat, Washington University in St. Louis

Document Type

Technical Report

Department

Computer Science and Engineering

Publication Date

2009

Filename

wucse-2009-76.pdf

DOI:

10.7936/K77D2SCR

Technical Report Number

wucse-2009-76

Abstract

Magnetic spin valve devices enable the design of logic and memory elements that are suitable for use when constructing digital systems. A master-slave flip-flop design is proposed that can be clocked using an externally applied global magnetic field. With an external global clock, the digital system no longer needs to deliver the clock on-chip, thereby eliminating the need for a clock distribution network. We assess the power, area, and speed implications associated with the ability to eliminate the clock distribution network on a hybrid CMOS-magnetologic digital system.

Comments

Permanent URL: http://dx.doi.org/10.7936/K77D2SCR

Recommended Citation

Hall, Michael; Jander, Albrecht; Chamberlain, Roger D.; and Dhagat, Pallavi, "Globally Clocked Magnetic Logic Circuits" Report Number: wucse-2009-76 (2009). All Computer Science and Engineering Research.
https://openscholarship.wustl.edu/cse_research/29