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Date of Award

Summer 8-15-2013

Author's School

School of Engineering & Applied Science

Author's Department

Computer Science & Engineering

Degree Name

Doctor of Philosophy (PhD)

Degree Type

Dissertation

Abstract

The scaling of CMOS technology, as predicted by Moore's law, has allowed for realization of high resolution imaging sensors and for the emergence of multi-mega-pixel imagers. Designing imaging sensors in advanced feature technologies poses many challenges especially since transistor models do not accurately portray their performance in these technologies. Furthermore, transistors fabricated in advanced feature technologies operate in a non-conventional mode known as velocity saturation. Traditionally, analog designers have been discouraged from designing circuits in this mode of operation due to the low gain properties in single transistor amplifiers. Nevertheless, velocity saturation will become even more prominent mode of operation as transistors continue to shrink and warrants careful design of circuits that can exploit this mode of operation.

In this research endeavor, I have utilized velocity saturation mode of operation in order to realize low noise imaging sensors. These imaging sensors incorporate low noise analog circuits at the focal plane in order to improve the signal to noise ratio and are fabricated in 0.18 micron technology. Furthermore, I have explored nanofabrication techniques for realizing metallic nanowires acting as polarization filters. These nanoscopic metallic wires are deposited on the surface of the CMOS imaging sensor in order to add polarization sensitivity to the CMOS imaging sensor. This hybrid sensor will serve as a test bed for exploring the next generation of low noise and highly sensitive polarization imaging sensors.

Language

English (en)

Chair

Viktor Gruev

Committee Members

James Buckley, Roger Chamberlain, Patrick Crowley, Barani Raman, William Richard

Available for download on Friday, July 22, 2044

Included in

Engineering Commons

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