Document Type

Technical Report

Publication Date

1991-02-27

Filename

WUCS-91-21.pdf

DOI:

10.7936/K73X84ZQ

Technical Report Number

WUCS-91-21

Abstract

ATM switching systems are required to maintain ordering for cells within a given virtual circuit. This is most commonly achieved using a switching system in which cells in a given virtual circuit are routed along a common path through the switching system. This solution has the drawback that it can lead to significant virtual circuit blocking unless the switching network is engineered with a large speed advantage, relative to the external links. Switching systems in which cells are routed independently, on the other hand, can balance the load dynamically and operate with a minimal speed advantage. This report describes a resequencer that can be used with such switching system to put cells back in the proper order, gives an economical implementation of such a resequencer and reports on a simulation study of its effectiveness.

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Permanent URL: http://dx.doi.org/10.7936/K73X84ZQ

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